1. Field
One embodiment of the invention relates to a semiconductor device which is driven by a power supply voltage that is supplied from outside, an information processing apparatus including the semiconductor device, and a power supply voltage variation suppressing method for suppressing a variation of the power supply voltage which is supplied to the semiconductor device.
2. Description of the Related Art
In recent years, higher integration density and higher performance have been promoted in semiconductor devices such as processors and various controllers. The processors and the controllers are used in personal computers or consumer electronic apparatuses.
A power supply voltage specification value in a conventional semiconductor device is, for example, 5V±10% (±500 mV), and a voltage margin (±500 mV) of this power supply voltage is relatively wide. However, in modern semiconductor devices, a decrease in power supply voltage has been promoted. Accordingly, there has recently been developed a semiconductor device having a power supply voltage specification value of, e.g. 1V±3% (±30 mV) or 1V±5% (±50 mV).
Power that is output from a power supply circuit is supplied to a semiconductor device via a power supply wiring line on a printed circuit board. In usual cases, in order to suppress a variation of a power supply voltage that is supplied to the semiconductor device, a measure has been taken to connect a capacitor (bypass capacitor) to the power supply wiring line.
However, in order to limit the variation in power supply voltage, which is supplied to the semiconductor device, within a narrow tolerable range of ±30 mV or ±50 mV, the above-described measure of connecting the bypass capacitor is inadequate in some cases. In particular, in the case where the variation of load current of the semiconductor device is large, the variation of the power supply voltage also increases due to, e.g. a resistor component and an inductor component, which are included in the power supply wiring line on the printed circuit board, and it may be possible that the variation in power supply voltage, which is supplied to the semiconductor device, cannot be limited within the tolerable range of ±30 mV or ±50 mV.
Jpn. Pat. Appln. KOKAI Publication No. 2003-124795 discloses a semiconductor integrated circuit having a function of holding the value of a power supply current at a fixed value. This semiconductor integrated circuit includes a load current detection unit and a dummy current path. The value of a current (dummy current) flowing via the dummy current path is controlled in accordance with the value of a load current which is detected by the load current detection unit. Thereby, the value of power supply current which is consumed by the semiconductor integrated circuit, that is, the value of the sum of the load current and dummy current, is kept at a constant value.
In the semiconductor integrated circuit of Jpn. Pat. Appln. KOKAI Publication No. 2003-124795, however, since useless current (dummy current) is consumed by the dummy current path, the power consumption of the semiconductor integrated circuit is uselessly increased.
Therefore, it is necessary to realize a novel function which can suppress a variation in power supply voltage, without causing an increase in useless power consumption.